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Liberate by Altos Design Automation

RTL (Front End) Tools

Product Description

Liberate is an ultra-fast standard cell and I/O library models creator. It generates electrical cell views for timing, power and signal integrity including advanced current source models (CCS and ECSM). It uses a unique “inside view” approach where each cell undergoes a pre-characterization circuit analysis that determines
all the necessary stimulus and internal logic states to ensure a complete, accurate and highly efficient characterization of that cell. Liberate supports complex cells including those required for low power design such as state retention flip-flops, level shifters, power switches and MTCMOS cells with sleep modes.

Liberate

Market Segment(s)

  • Embedded
  • Enterprise
  • Home
  • Mobile

ARM Processor(s)

  • Cortex-A53
  • Cortex-A57
  • ARMv8

Physical IP

  • General Purpose I/O (Inline / Staggered)
  • Specialty I/O (HSTL, SSTL)
  • Standard Cell Libraries
 
ARM Connected