I2C Master Controller (APB) by Digital Blocks, Inc.

SoC IP Provider

Product Description

The Digital Blocks DB-I2C-M-APB Controller IP Core interfaces an ARM microprocessor via the AMBA 2.0 APB System Interconnect Fabric to an I2C Bus. The I2C is a two-wire bidirectional interface standard (SCL is Clock, SDA is Data) for transfer of bytes of information between two or more compliant I2C devices, typically with a microprocessor behind the master controller and one or more slave devices on the I2C bus. The DB-I2C-M-APB targets high performance microprocessor applications, where minimal microprocessor involvement is needed.

I2C Master Controller (APB)

Market Segment(s)

• Embedded
• Enterprise
• Home
• Mobile

ARM Processor(s)

• ARM7EJ-S
• ARM7TDMI
• ARM7TDMI-S
• ARM720T
• ARM920T
• ARM922T
• ARM926EJ-S
• ARM940T
• ARM946E-S
• ARM966E-S
• ARM968E-S
• ARM1020E
• ARM1022E
• ARM1026EJ-S
• ARM1136J-S
• ARM1136JF-S
• ARM1156T2(F)-S
• ARM1176JZ(F)-S
• ARM11 MPCore
• Cortex-A8
• Cortex-A9
• Cortex-M1
• Cortex-M3
• Cortex-R4
• StrongARM
• XScale
• Mali55
• Mali-200+GP2

System IP

• Interconnect Fabric
• Memory Controller

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