TFT LCD Controller IP Core (AHB) by Digital Blocks, Inc.

SoC IP Provider

Product Description

The Digital Blocks DB9000AHB TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA 2.0 AHB Bus to a TFT LCD panel. In an FPGA, ASIC, or ASSP device, the microprocessor is an ARM processor and frame buffer memory is either on-chip SRAM memory or larger off-chip SRAM or
SDRAM.

TFT LCD Controller IP Core (AHB)

Market Segment(s)

• Embedded
• Home
• Mobile
• Mobile Computing

Target Platform(s)

• Android
• Linux
• Nucleus
• OpenGL ES
• OpenVG
• OSE
• Other OS
• Palm OS
• QNX
• Symbian
• ThreadX
• VRTX
• VxWorks
• Windows Embedded CE
• Windows Mobile

ARM Processor(s)

• ARM7EJ-S
• ARM7TDMI
• ARM7TDMI-S
• ARM720T
• ARM920T
• ARM922T
• ARM926EJ-S
• ARM940T
• ARM946E-S
• ARM966E-S
• ARM968E-S
• ARM1020E
• ARM1022E
• ARM1026EJ-S
• ARM1136J-S
• ARM1136JF-S
• ARM1156T2(F)-S
• ARM1176JZ(F)-S
• ARM11 MPCore
• Cortex-A8
• Cortex-A9
• Cortex-M0
• Cortex-M1
• Cortex-M3
• Cortex-R4
• ARMv4
• ARMv5
• ARMv7
• StrongARM
• XScale
• Mali55
• Mali-200+GP2
• Mali-400

System IP

• Interconnect Fabric
• Memory Controller

Physical IP

• DDR I/O (DDRI/II)
• General Purpose I/O (Inline / Staggered)
• SRAM Memory Compilers
• Standard Cell Libraries

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