
If you are running processor-driven tests in digital simulation on your processor-based design, you know how difficult and time consuming it is to figure out what went wrong in a failing simulation. Manually slogging through log.EIS or other processor trace files, assembly listings, symbol tables, and logic simulation waveforms is slow and very inefficient. Codelink provides processor debug views for source/assembly, registers, memories, variables, etc. that are completely synchronized with the Questa/ModelSim logic waveforms. You can run Codelink during simulation, and when running Codelink post-simulation, you can step forward and backward through the simulation in a matter of seconds. Codelink connects to an ARM processor in design signoff model, RTL, or gate form instantiated in a block or chip-level simulation and requires no change to the design or processor models. Simulation results with and without Codelink attached to the simulation are identical.
Features
* Interactive, post-simulation debug of batch and regression runs
* Step forward and backward through C and assembly execution completely correlated with HW logic signal waveforms
* View registers, software variables, memory, and call stack completely correlated with HW logic signal waveforms
* Compatible with RTL or DSM processor representations
Supported Processors
* ARM7TDMI
* ARM7TDMI-S
* ARM926EJ-S
* ARM946E-S
* ARM966E-S
* ARM968E-S
* ARM1136JF-S
* ARM1156T2F-S
* ARM1176JZF-S
* ARM11MPCore
* ARM Cortex-A8
* ARM Cortex-A9
* ARM Cortex-A9MP
* ARM Cortex-R4
* ARM Cortex-R4F
* ARM Cortex-M3