Nextreme Structured ASIC by eASIC

Fabless Semiconductor Provider licensing ARM Processor through Foundry Program

Product Description

Nextreme is a family of Structured ASIC devices, manufactured on 90nm CMOS process, powered by eASIC’s patented customization technology. A Structured ASIC is a configurable logic array that provides ASIC-like performance, power and low unit-cost combined with FPGA-like flexibility, short turnaround-time and No NRE.

Nextreme is built on a breakthrough configurable fabric which combines Look-Up-Table (LUT) based cells with single via-layer customized interconnect. The logic cells configuration can be performed either by loading bitstreams to program the LUTs, or by using an additional via-layer mask as shown in figure 1. The bit-stream programmable product is called Nextreme SL and the via programmable one is dubbed Nextreme VL. Both programming methods generate identical devices, featuring similar performance.
The Nextreme Structured ASIC family offers the following features:

350 MHz system performance
Up to 5M ASIC gates
Up to 358K eCells or 700K LUTs
Up to 5.5 Mb of dedicated Block RAM (bRAM)
Up to 5.5 MB of distributed dual-port memory (eRAM)
Up to 8 PLLs and 32 internal clock domains
Up to 20 DLLs
Up to 790 user configurable I/Os:
» 533 Mbps DDR2 & 400 Mbps DDR1
» 800 Mbps LVDS
» On-die Termination
» Dynamic Impedance matching customization

Built-in scan chain
» JTAG-based boundary and internal scans
» External SPI Flash interface

Core voltage: 1.2V or 1.3V

Nextreme Structured ASIC

Market Segment(s)

• Embedded
• Enterprise
• Home

Companion Processor(s)

• Biometrics
• Communication
• DSP
• Flash
• I/O
• Multimedia

ARM Processor(s)

• ARM926EJ-S

System IP

• Interconnect Fabric

Physical IP

• DDR I/O (DDRI/II)
• General Purpose I/O (Inline / Staggered)
• Register File Memory Compilers
• Specialty I/O (HSTL, SSTL)
• SRAM Memory Compilers

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