NIPPON SYSTEMWARE CO.,LTD. - CORAL

NIPPON SYSTEMWARE CO.,LTD.

CORAL

Emulator

Product Description

NSW has been now offering the SoC design evaluation platform as called
CORAL for designing and evaluating the ARM926EJ-S base SoC.
CORAL has the dedicate ARM926EJ-S base SoC chip which has useful internal
bus matrix construction and has connection matrix between the internal
bus and external bus PINs for implementing into the FPGA level world.
And CORAL built in the large FPGA (Xilinx Virtex 4) for user designed logic.
Now CORAL enables the real operational speed with more complete equivalent
circuit design of ARM926EJ-S base.

ARM926EJ-S base SoC Development & Evaluation Platform
CORAL provides the real target operation SoC design evaluation plat form

High operational clock
ARM926EJS 150MHz (Max)
On chip AHB bus matrix 75MHz (Max)
External AHB bus connection 75MHz maximum

Configurable Memory map
Install user design logic with external FPGA and expansion connectors

Evaluation Chip (TSUNAMI)
ARM926EJ-S
Cache: I-16KB, D-16KB
TCM: I-16KB, D-16KB
* Cache and TCM memory are dedicated memories
External 3 layers AHB bus 75MHz
AHB0 (TSUNAMI Master)
AHB1 (TSUNAMI Slave)
AHB2 (TSUNAMI Slave)
User installable Xtal OSC unit and programmable PLL for system clocks
Configurable Memory Map
Basic internal peripherals (Clock generator, SDRMC, INTC, TIMER, UART)
Enable/Disable controllable internal peripherals

Board configration
TSUNAMI (ARM926EJ-S)
Flash memory
DDR-SDRAM (Max 75MHz) 128MB
SDR-SDRAM (Max 75MHz) 128MB
SRAM 1MB
User BOOT ROM (Flash ROM) 32MB
System ROM 32MB
SD connector
FPGA
Xilinx Vertex-4 (BTO) for user design logic
Xilinx System ACE
Compact Flash (For FPGA configuration data)
Debug
JTAG ICE I/F
ETM9 TRACE port
Other
System QTH Connector (Logic Tiloe compatible)
SD CARD I/F
UART 2 channel
User LED
User Switch
Config EEPROM (SPI I/F)

http://www.nsw.co.jp/solution/slt_lsi/coral/english_coral/coral_top_eng.html