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The Denali Flash memory controller is a complete embedded Flash controller. It supports ECC for SLC and MLC devices, algorithms that are supplied by Denali. The controller uses pipelined structured and memory-mapped commands. This solution provides for the maximum throughput and maximizes the flexibility for Flash Devices. The command flexibility allows for future modifications to assure long-term device compatibility while supporting new features.
The controller supports partial page operation, multi-plane operation and other advanced commands required to provide the maximum performance and quality of your flash array. The controller is developed for ease of integration, performance, quality and developed for use in ASIC and FPGA platforms. The controller provides user selectable options that allow for maximum flexibility for target processors and software. The controller has been designed to reduce processor overhead and background processing tasks.
Optional modules include but are not limited to ECC, AHB, AXI, PCI, and PLB. The controller supports access to the spare area, and supports most all-available NAND devices. The controller has been optimized to work with the Spectra Flash file system and comes complete with a Driver interface.
Denali also supports a mixed-mode simulation environment to verify the Flash array with the controller and File system. In addition, a FPGA prototype board assures functionality and performance before silicon. Check with Denali for your device type.
§Configurable for Bank or Chip select options
• 4 Banks of NAND Flash
• 5 NAND Flash devices per Bank to achieve 32 bit data and 8 Bit ECC
• Option on/off ECC depending on device selection
• Optional single and Multi bit error Correction
• Multiple ECC solutions
• Error Logging with ECC and detection
• Interrupt generation based on ECC error report
• Posted write buffers
• Data width from 8 to 64 bits
• Optional data buffering for maximum performance
• Simple User Interface for on-chip integration
• Programmable Access Timing
• Access to spare Data space in NAND device
• Supports all NAND Command Accesses
• Support for Boot operation
• Fully programmable timing
• Independent timing for Read/Write
• Wait State Insertion up to 3 cycles