AXI nVS nSys Verification Suite by nSys Design Systems (Acquired by Synopsys)

Product Description

The AXI nVS provides a comprehensive solution for functional verification of AXI based designs. The nVS allows design and verification engineers to quickly and extensively test the entire functionality of the AXI compliant devices. nSys also offers solutions for functional verification of APP and AHP busses.

Availability of Test Suites lets the designer focus on only the features unique to his design. The nVS leverages advanced verification techniques in creating a versatile testbench environment.

The AXI nVS consists of the following components:
- AXI Master/Slave BFM
- AXI Checker
- AXI Monitor
- Test Suites

Some of the key features of nVS are:
- Generating and driving bus traffic as a AXI Master
- Configurable outstanding transactions
- Out of order transaction completion
- Unaligned data transfers using byte strobes
- Write re-orderings

- Responding to transactions as a AXI Slave
- Configurable multiple transaction
- Out of order completion
- Configurable write interleave depth
- Unaligned data transfers using byte strobes.

- Compliant with the latest AXI specification
- Supports all AXI data and address widths
- On-the-fly protocol and data checking
- Simple and flexible BFM tasks
- Highly parameterized: Verification environment & Logical parameters
- Mailboxes for data checking
- Support for multiple instantiations to create complex verification environment
- Programmable message logging capabilities
- Consistency of installation, operation, and documentation across nVS family

AXI nVS nSys Verification Suite

ARM Processor(s)

• ARM1156T2(F)-S
• ARM1176JZ(F)-S
• Cortex-A53
• Cortex-A57
• ARMv8

System IP

• Interconnect Fabric