
System-on-Chip Lite +
“Ethernet-ready” ARM7TDMI-S™ based, customizable micro-controller
ARM7TDMI-S-based customizable micro-controller
Development platform for ARM7TDMI-S
Easy development and verification flow
Description
System-on-Chip Lite+ (SoCLite+) is part of NEC’s System-on-Gate Array family concept for low- to mid-volume system-on-chip and ARM-based microcontroller solutions. The SoCLite+ single-chip device is based upon standard ASIC technology and consists of two blocks: an ARM7TDMI-S based subsystem and a sea-of-gates type Gate Array ASIC area. These blocks are interconnected via the AMBA™ AHB and APB busses. In SoCLite+, the ARM subsystem is featuring a multi-port memory controller, a 10/100M Ethernet™ Media Access Controller (MAC) and an AHB-to-AHB bridge. Together with an interrupt controller, a timer, a watch-dog timer and a UART this subsystem block is fully pre-designed and pre-verified as a supermacro. Connected to this supermacro, the Gate Array area allows the customer to significantly expand the system capabilities by implementing additional customer specific logic and/or peripheral functions.
An important component of SoCLite+ is the FPGA-based development board that functionally represents the final System-on-Gate-Array device. Using the development board, the SoCLite+ device is pre-generated by the designer using a familiar FPGA design flow. After in-system verification and early start of software development it's only a short step to SoCLite+ by converting the FPGA RTL netlist to the ASIC design environment.
Applications
SoCLite+ is designed for Ethernet-ready embedded control applications requiring high data-transfer rates and fast access to the external memory. SoCLite+ can be used for a wide range of different applications like factory automation, industrial bus systems, card readers, business phones, terminals and home communication. Because of its low unit cost, low NRE cost and short prototyping turnaround times, SoCLite+ is especially an ideal solution for emerging applications with uncertain market acceptance.
Features
• ARM subsystem
- ARM7TDMI-S core
- 32-bit ARM and 16-bit Thumb® instruction set
- 32-bit x 8-bit Multiplier
- SRAM: 8 KBytes
- Mask-ROM: 3 Kbytes
- Operating frequency: up to 60 MHz
- 10/100M Ethernet Media Access Controller (MAC)
- Multi-port memory controller supporting: SDRAM, Flash (standard/page mode), SRAM and ROM
- Programmable interrupt controller: 32 interrupts, 8 priority levels
- Peripherals: UART, timer, reset, watchdog
- JTAG interface for debug and boundary scan
User-defined logic (UDL) area for custom specific function integration
-Sea-of-Gates type 0.25µm gate length Gate Array ASIC architecture
- Two UDL size options:
Option A: up to 250K raw gates
Option B: up to 440K raw gates
- AHB and APB interconnection to the ARM7TDMI-S subsystem
Operating voltage: 2.5 V + 0.25 V
Temperature range: -40 to +85°C
Packages:
- 240-pin FPBGA for option A
- 256-pin BGA for option B
Contact information:
NEC Electronics (Europe) GmbH
Arcadiastrasse 10
D-40472 Duesseldorf / Germany
Tel. +49 (0)211 6503 1197
Fax +49 (0)211 6503 1344
E-Mail: socinfo@eu.necel.com
Web: www.eu.necel.com/soclite+