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ARM and Partners Sponsor Informative Breakfast and Lunch Panels At The 44th Design Automation Conference

04 June 2007

WHAT: ARM and Partners sponsor informative breakfast and lunch panels at this year’s 44th Annual Design Automation Conference (DAC) in San Diego, CA.

The panels address six key industry topics to include: Deployment of technology for successful wireless applications; IP-XACT enablement of successful FPGA and processor designs; implementation and integration challenges of large IP sub-systems into SSoCs design with new and innovative solutions; Gap between ESL and RTL methodologies with management solutions, Importance of the fabless model as part of a more holistic DFM methodology; Introduction of the new, Low Power Methodology Manual authored by power-management experts from ARM and Synopsys.

Tuesday, June 5, 7:30 AM - 9:00 AM
San Diego Convention Center, Room 30CDE
Cadence and ARM Wireless Technical User Group Meeting Breakfast

John Goodenough, director of design technology, ARM, participates in the meeting to discuss real-world examples of successful ARM and Cadence technologies deployed for wireless applications.

Tuesday, June 5, 7:30 AM - 9:00 AM
San Diego Convention Center: Room 26A/B
ARM and Mentor Graphics Breakfast Panel

IP-XACT Specification Enables Rapid, Reliable FPGA and Processor-based Design - Dominic Pajak, product manager, Processor Division, ARM, participates in a seminar where Mentor Graphics also presents their tool flow using the new ARM Cortex-M1 processor as the basis of an example system.
http://www.mentor.com/products/fpga_pld/events/escj.cfm

Tuesday, June 5, 11:30 AM – 2:00 PM
San Diego Convention Center: Room 28A
ARM and Magma Lunch Panel

Challenges of Implementing and Integrating Super Systems on Chip (SSoCs) - Nandan Nayampally, product marketing manager, Processor Division, ARM and Rob Aitken, ARM Fellow, join moderator, Ron Wilson, executive editor, EDN and panelists from Magma, Microsoft and TSMC panelists to discuss the complexity and challenges of managing the implementation and integration of large IP sub-systems into SSoCs and explore new and innovative approaches to implementing SSoCs that truly automate chip building, reduce cycle time and design costs drastically, yet meet design performance, power and area targets.

Tuesday, June 5, 12:00 noon - 2:00 PM
San Diego Convention Center, Room 32 A/B
Lunch panel sponsored by Mentor Graphics, the 5th Annual ESL Symposium at DAC
The Missing Link: In Search of an ESL-to-RTL Design Flow
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John Goodenough, director of design technology, ARM, joins moderator Peggy Aycinena, EDA Confidential and a panel of industry experts who will address this topic, discuss how their organizations manage the gap between ESL and RTL methodologies, and map the technologies that hold the most promise for crossing the ESL-to-RTL divide. 

Wednesday, June 6, 9:00 AM - 12:00 PM
San Diego Convention Center, Room 11A
Hands-on tutorial - Mentor Graphics, Chartered, Sierra Design Automation, ARM
Approaching Yield in the Nanometer Age: The Framework for an Extensible DFM Methodology
- This tutorial goes into detail on the technical challenges and solutions within both the business and historical context of the IC design and manufacturing process. It will show the importance of the fabless model as part of a more holistic DFM methodology and describe what the new tools should look like.

Wednesday, June 6, 11:30 AM - 1:45 PM
San Diego Convention Center, Room 28-ABCDE
ARM and Synopsys Lunch Panel
Achieving Low-Power with Recipes for Silicon Success
-  Dave Flynn, ARM Fellow and Dipesh Patel, vice president of technology, Physical IP, ARM, and other power-management experts from Synopsys will introduce the new, “Low Power Methodology Manual” (LPMM), which is a useful low-power design solutions guide describing a series of recommendations (the ingredients and recipes) for successfully managing power in SoC designs. Case studies and step-by-step recommendations to achieve low-power silicon success will be discussed. Solutions covered to include both static and dynamic power challenges, including MTCMOS state retention power gating, dynamic voltage and frequency scaling, as well as power network design and analysis.

WHEN: Monday – Friday, June 4–8, 2007

WHERE: 44th Design Automation Conference (DAC)
                 San Diego Convention Center, San Diego, Calif.

WHO:  ARM designs the technology that lies at the heart of advanced digital products, from wireless, networking and consumer entertainment solutions to imaging, automotive, security and storage devices. ARM’s comprehensive product offering includes 16/32-bit RISC microprocessors, data engines, graphics processors, digital libraries, embedded memories, peripherals, software and development tools, as well as analog functions and high-speed connectivity products. Combined with the company’s broad Partner community, they provide a total system solution that offers a fast, reliable path to market for leading electronics companies. More information on ARM is available at http://www.arm.com.

- ENDS -

CONTACT DETAILS:
ARM PRESS OFFICE: +44 208 996 4141

 Nandita Geerdink
Text 100
+1 415 593 8457
nathaliez@text100.com





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