ARM Showcases Advanced Solutions At DATE 2006

What:  ARM will demonstrate several technology solutions on its booth (Stand #F20), at the DATE (Design Automation and Test Europe) Conference, in Munich, Germany, including:

• RealView® SoC Designer, which enables developers to quickly create and explore processor models and system prototypes.
• RealView Core Generator, which provides a comprehensive environment for modeling and analysis of processors and processor subsystems.
• AMBA® Designer, which enables simultaneous parallel simulations of cycle accurate and generated RTL components.
• Artisan® family of physical IP, including memories, standard cells, I/Os and high-speed PHYs, which achieves the best combination of performance, density, power and yield for a given manufacturing process.

ARM will also participate in several panels, presentations and special events:

Tuesday, 7 March

• 11.00am – “Accent Proves Multiple Supply Multiple Voltage Low-Power Physical Design Using Cadence Encounter Suite and ARM® Physical IP.”
• 11.30am – “Using SystemVerilog Assertions for AXI™ bus verification.”
• 1.00pm – “In Search of the Holy Grail: High Performance, Cost-effective Design at sub-90-nm.”
• 1.00pm – “A Virtual System Prototyping Methodology for ARM Processor-based SoCs.”

Wednesday, 8 March

• 1.00pm – “Using the Verification Methodology Manual (VMM) for SystemVerilog.”
• 5.00pm – Synopsys Stand #5A – ARM-Synopsys Cocktail Party and book signing: Verification Methodology Manual for SystemVerilog

Thursday, 9 March

• 8.30am – “Industrially Proving SPIRIT Consortium Standards for Design Chain Integration.”
• 2.00pm – “Piracy: A Global Threat to EDA and IP.”
• 3.30pm – “Global IC Development Design: Overcoming the Trials and Tribulations of Geographically Distributed Design.”
• 4.00pm – “Low-Power Design Tools: Are EDA vendors taking this matter seriously?”

In addition, ARM will be showcased at several Partner booths and demo suites:

• Carbon Design Systems – Stand #A18
  • “SOC-VSP and ARM RealView SoC Designer.”
• Synopsys – Stand #5A
  • ARM IEM and Synopsys Galaxy demo + booth drawing for iPod nanos and VMM books.
• Synopsys – Demo Suite
  • 11.30am – “Design for LP with Galaxy and ARM1176™ IEM-Enabled Cores.”
  • 3.00pm – “AMBA 3 AXI Design Verification with XVC-Enabled DesignWare VIP and the VMM for SystemVerilog.”
• Tenison Design Automation – Stand #F23
  • “Bridging the Model Gap: ARM RealView SoC Designer and Tenison VTOC Provide a Complete Flow for ESL Design Reusing Legacy VHDL and Verilog IP.”

When:  6 -10 March 2006

Where: DATE 2006
MESSE Munich, Germany
Stand #F20

Who: ARM designs the technology that lies at the heart of advanced digital products, from mobile, home and enterprise solutions to embedded and emerging applications. ARM’s comprehensive product offering includes 16/32-bit RISC microprocessors, data engines, 3D processors, digital libraries, embedded memories, peripherals, software and development tools, as well as analog functions and high-speed connectivity products. Combined with the company’s broad Partner community, they provide a total system solution that offers a fast, reliable path to market for leading electronics companies. More information on ARM is available at http://www.arm.com.

ENDS

ARM, RealView and AMBA are registered trademarks of ARM Limited. ARM1176 and AXI are trademarks of ARM Limited.  Artisan is a registered trademark of ARM Physical IP, Inc., a wholly owned subsidiary of ARM. All other brands or product names are the property of their respective holders. “ARM” is used to represent ARM Holdings plc; its operating company ARM Limited; and the regional subsidiaries ARM INC.; ARM KK; ARM Korea Ltd.; ARM Taiwan; ARM France SAS; ARM Consulting (Shanghai) Co. Ltd.; ARM Belgium N.V.; AXYS Design Automation Inc.; AXYS GmbH; ARM Embedded Technologies Pvt. Ltd.; and ARM Physical IP, Inc.

ARM PRESS OFFICE: