19 April 2011
Time: 8:00 AM PDT
In today’s design environment being first to market is one of your strongest tools to gain the upper hand against the competition. However, with the increase in SoC design complexity fueled by the consumer’s insatiable appetite for higher performance and longer battery life in their devices, design cycles are rapidly expanding. How can you optimize your SoC for performance and battery life without extending your design cycle? How can you leverage the latest processor technologies to satisfy the consumer’s demand for feature rich devices? And how do you ensure silicon manufacturing that is right the first time?
This webinar will detail best-in-class strategies for designing optimized SoCs using silicon proven ARM®Artisan® Physical IP for TSMC’s 40nm G / LP manufacturing processes. This session will demonstrate cost-effective techniques for designing performance driven consumer devices requiring advanced functionality without increasing power consumption. We will also cover enabling higher levels of technology innovation, while maintaining power budgets in performance driven consumer devices such as disc drives, set-top boxes, mobile computing devices, networking applications, high-definition televisions and graphic processors.
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