Building a Customized Debug and Trace Solution for a Multi-Core SoC


On Demand


Mayank Sharma & Guilherme Marshall


19:00 GMT


Attend this webinar to learn how to quickly create a solution to meet debug-ability, area and power requirements of your SoC. During the webinar we will use the views of DS-5 to illustrate how hardware debug features translate into benefits to the software developer.

Today’s SoCs are ever increasing in complexity with features such as multiple cores, multiple clusters, heterogeneous compute, coherency, DVFS and multiple architectures. Some hardware debug solutions fail to address the entire SoC space and this is where a customized debug and trace solution targeted at your SoC is essential for hardware debug, software development and performance analysis. Based on a real-world example of an ARMv8 case study, we will take you through the key steps in architecting, designing and verifying a debug and trace solution for an ARMv8 SoC using advanced ARM® CoreSight™ IP offered by CoreSight SoC-400 product.

Mayank Sharma, Technical Marketing Engineer, Systems & Software Marketing, ARM
As a designer of debug and trace solutions for ARM development platforms, Mayank Sharma recently architected the debug and trace solution for an ARM v8 multi-core platform. He is now part of the Systems & Software Marketing team and brings hands-on experience and technical skills to address ARM partner needs.

Guilherme Marshall, Product Manager, Development Solutions Group, ARM
Guilherme is responsible for DS-5 Development Studio, ARM’s flagship suite of software development tools. With over 14 years’ experience in embedded software development, he joined ARM in 2010 and has since been on a mission to keep ARM as the favorite architecture of software engineers.

click here to register for this webinar


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